1. Field of the Invention
This invention relates to a semiconductor integrated circuit device (hereinafter, referred to as an IC) and its test method, and more particularly to an improvement of the output buffers, a function test method of the IC and an electric characteristics test method of the output buffers.
2. Description of the Related Art
A conventional semiconductor integrated circuit device with an output buffer will be explained, referring to an IC block diagram in FIG. 1 and a circuit diagram of a Bi-CMOS output buffer in FIG. 2.
An IC 1 is composed of an internal circuit 3, an output terminal 4, and an output buffer 6 inserted between the internal circuit 3 and the output terminal 4. An output signal is supplied from the output terminal 4 to an external circuit 7. In supplying the output signal from the internal circuit 3 to the external circuit 7, the output buffer 6 functions to match the internal circuit 3 with the external circuit 7. Specifically, the output buffer 6 converts the signal outputted from the internal circuit 3, without changing its value, into a signal having an ability required to actuate the external circuit 7.
FIG. 2 is a detailed circuit diagram of the output buffer of FIG. 1, which is a Bi-CMOS output buffer composed of a CMOS inverter and a Bi-CMOS inverter. The function of the Bi-CMOS output buffer of FIG. 2 is to convert a small current signal in the internal circuit 3 into a large current signal for driving the external circuit 7. In this case, the current driving ability, i.e., the signal ability is made greater through the conversion, but the value of the signal has remains unchanged.
As mentioned above, the output buffer 6 was conventionally made up of a single circuit having only a single function and a single ability. Besides the conversion of the current driving ability, the functions of conventional output buffers include the conversion of a 3-V internal power supply system into a 5-V output power supply system and the conversion of a digital signal into an analog signal. In each conversion, the signal supplied to the output buffer 6, or the signal having the value to be supplied from the IC 1 to the external circuit 7, is converted, without changing its value, into a signal whose ability is suited for the external circuit 7.
In a digital-to-analog converter (hereinafter, referred to as a DAC), although the output signal behaves as if the switching of the power supply systems or the driving current values were being done, that is, the DAC had multiple output buffers and consequent multiple functions and abilities, the DAC output buffer has only a single function and a single ability. For example, the 1-V output and 2-V output are not selectively supplied to multiple external circuits, but either of them is supplied to the same external circuit according to the value of the input signal to the DAC. That is, it is impossible to supply only 1 V to a particular external circuit and only 2 V to another external circuit, because supplying this way prevents the DAC from operating as it is expected. This is apparent from the fact that for a function test on the DAC, producing only 1 V is insufficient for verification. Therefore, the output buffer of the DAC must be regarded as an output buffer with a single independent function.
In the case of an IC using a large-current output buffer, because a large current is allowed to flow even when the load is low, an increase in the power consumption will result. Because a large current is permitted to flow with a low load, noises resulting from overshoot and undershoot are liable to occur due to the effect of the inductance of the wires. This effect can also cause fluctuations in the power supply voltage. Since, during a function test, an ordinary LSI tester runs short of the current capacity for an IC having a conventional large current driving output buffer, accessories including an auxiliary power supply are necessary or a large-current LSI tester must be used, which makes the cost of the function test higher. In another method, since a pattern that prevents simultaneous switching of multiple output buffers must be used, the test time becomes longer. With the recent tendency for the number of IC output pins to increase noticeably, this problem is becoming more serious.
For the output power supply systems, ICs using CMOS output buffers cannot be used for systems using external circuits with ECL input circuits, whereas ICs using ECL output buffers cannot be used for systems using external circuits with CMOS input circuits. These problems have been solved by inserting an interface circuit for converting the voltage systems. This, however, creates new problems of an increased number of components, and consequent increases in the power consumption the board size, the delay time, and other factors. In the case of ICs connected to multiple external circuits having different power supply systems, testing its functions requires multiple power supply systems, which makes it difficult to conduct the test.
As mentioned above, since the output buffer of a conventional semiconductor integrated circuit device is restricted to a buffer with a single function and a single ability, it cannot be helped to use an ability greater than necessary or an external component in order to deal with a low load.
Another conventional semiconductor integrated circuit device with output buffers will be explained, referring to an IC block diagram in FIG. 3 and a circuit diagram of a select circuit in FIG. 4. An IC 1 is composed of input terminals 2a and 2b, an internal circuit 3, output terminals 4, select circuits 5 inserted between the internal circuit 3 and the output terminals 4, and output buffers 6. The output signals are supplied from the output terminals 4 to an external circuit 7. The select circuits 5, which are controlled by the test mode signal supplied to the input terminal 2b, select one of the outputs of the output buffers 6 that is supplied from the output terminal 4 to the external circuit 7 by switching between the individual output signals from the internal circuit 3 and the test signal to the input terminal 2a. Here, the test mode signal is a switching signal for bringing the integrated circuit device into an operating state, whereas the test signal is an input signal for setting an expected value for the output signal. Specifically, by allowing the test mode signal to operate the integrated circuit device and setting the test signal, the expected value for the signal supplied from the output terminal 4 can be set. An electric characteristics test can be carried out by comparing the expected value with the signal actually supplied from the output terminal 4. FIG. 4 is a detailed circuit diagram of the select circuit 5 of FIG. 3, which is made up of a 2-input NAND and an inverter.
An electric characteristics test on the output buffer 6 is carried out by, based on the test mode signal to the input terminal 2b, selecting the test signal to the input terminal 2a as the output of the select circuit 5. Since the output of the select circuit 5, or the test signal to the input terminal 2a whose contents are previously known, is actuated by the output buffer 6 and supplied from the output terminal 4, setting the test signal supplied to the input terminal 2a allows the expected values for the output signals from all the output terminals 4 to be easily set at the same value. In this way, during testing, because all the output terminals supply the output signals of the same expected value according to the test signal supplied to the input terminal 2a, an electric characteristics test can be performed easily in a short time.
It is possible to conduct an electric characteristics test on the output terminal 4 without providing the select circuits 5, by keeping the time required for measurement and the output signal after setting the input signal supplied from the input terminal 2a to the internal circuit 3 to set the output signal from the internal circuit 3, that is, after setting the output signal from the output terminal 4 in a normal operating state. This, however, requires many test patterns for setting the expected values for the output signals from the output terminals 4, which results in a longer time required for the electric characteristics test.
A method is known which has each IC output terminal provided with a 3-value output buffer, and which places an IC in a high-impedance state and tests the other ICs on the board, as disclosed in Published Unexamined Japanese Patent Application No. 3-225845. This method, however, is to insulate one IC from the other ICs with the interconnections kept unchanged, which is nothing to do with testing ICs themselves.
In an electric characteristics test, the capability of the output buffer must be drawn out to the full without restriction. Recently, the power consumption per output terminal has been increasing as the current driving ability of the output buffer becomes larger. In a conventional test method, because multiple output buffers produce outputs simultaneously, running the electric characteristics test involves an enormous amount of power consumption. Therefore, when an ordinary LSI tester is used in such a test, the tester runs short of the current capacity, making the power supply unstable. This limits the value of the output current supplied from the output terminal, which prevents an accurate test. To conduct an accurate test, accessories including an auxiliary power supply are necessary or a large-current LSI tester must be used. With the recent tendency for the number of output pins to increase, this problem is becoming more serious.
As noted above in connection with FIGS. 3 and 4, the conventional semiconductor integrated circuit device and test method of its output buffers have the problem that the simultaneous driving of multiple buffers leads to a shortage of the current capacity, which makes it impossible to con duct the test accurately or requires an additional part to be attached externally.